Most memory devices found in MOS integrated circuits, such as dynamic registers and static random access memory (RAM) cells, are considered "volatile" because memory is lost if electric power is interrupted. Dynamic registers rely upon charges accumulated on particular circuit capacitances to store information. Unfortunately, the register charges leak with the passage of time and require refreshing, typically hundreds of times per second. Static RAM cells employ bistable (e.g., flip-flop) circuits. However, for such static cells to function, current must flow in response to noise excitations in one of two cross-coupled circuit branches. The volatility of dynamic registers and static RAM cells is a substantial disadvantage and many efforts have been made over the past decade to develop inexpensive, non-volatile MOS memories.
The efforts to develop non-volatile devices have focused on floating gate structures, which are generally defined by a floating island of conducting material, which is electrically insulated from (while remaining capacitively coupled to) a substrate to form a gate overlying the channel of a field effect transistor (FET). Charge stored on the gate is "read" by its effect on the transistor.
Electrically programmable floating gate structures are known. For example, U.S. Pat. Nos. 3,728,695 and 3,825,946 issued to Frohman-Bentchkowsky disclose MOS structures having a floating gate, as described above, and one or more further gates arranged to charge or discharge the floating gate by producing an avalanche breakdown at a junction and thereby permitting electron tunneling into or out of the gate element. Typically, high currents have been required during the programming of such devices because only a small fraction of the programming current is sufficiently displaced and energetic enough to reach the floating gate. Other devices, such as those disclosed in U.S. Pat. No. 4,334,292, have employed electron beams or hot electron injection techniques to charge floating gate structures. A number of devices have also made use of photoelectric effects (e.g., irradiation with ultraviolet light) to erase the charge on a floating gate by employing an insulating oxide which becomes conductive when irradiated.
One of the most serious disadvantages of known non-volatile memory devices has been their manufacturing complexity. It is not uncommon for an electrically alterable floating gate device to require seven or more masking steps. When an electron injector or an electrically erasable feature is also included, even more masking steps and other fabrication difficulties are encountered.
There exists a need for better non-volatile memory devices that are economical to manufacture and simple to use. In particular, memory devices that require few masking steps and do not rely on individual electron beams or charge injectors for each memory cell, would satisfy a long-felt need in the industry. Such devices would make it economical to introduce non-volatile memory to almost any integrated circuit chip and allow, for example, customized processing elements or cryptographic communication modules to be fabricated inexpensively.
Moreover, there exists a need for arrays which provide a simple interface between static RAM cells and non-volatile memory devices. A simple, economical device that integrated a RAM circuit and a non-volatile element would be a significant improvement in the art. By arranging such combination devices into an array, non-volatile data storage can be accomplished much faster.